Title: Application aware microarchitecture adaptation for performance-power tradeoff
Speaker: Naga Pavan Kumar Gorti, ECpE Graduate Student
Abstract: Adaptive microarchitectures are an attractive option to carry out processor performance and power consumption tradeoff. Reconfiguring hardware components to match application and user’s demands results in optimal tradeoff. A major challenge in using such architectures is managing the complexity of the involved control. The possibilities for adaptation increase rapidly with the number of adaptive components and their adaptivity levels. As such, an exhaustive evaluation approach to determining the best adaptation is prohibitively expensive. Alternative lightweight solutions involving adaptation of constrained instruction windows, rather than a holistic adaptation for the entire application, result in suboptimal tradeoff. We claim that the number of configurations that need to be considered to provide effective tradeoff is relatively small. Our experiments on a x86-based adaptive processor architecture confirm this claim. In this research, we develop methods to prune the configuration space without sacrificing the effectiveness of user demand satisfaction significantly.
We also develop a novel two stage adaptation process for carrying out performance-power tradeoff. The first stage statically generates and utilizes comprehensive application-wide performance and power characteristics (PWC) through offline profiling to preselect configurations to be deployed for various portions of an application execution profile. Any deviations between the expected and actual PWC are handled by the second stage, which conditionally differs the deployed configurations from the preselected ones. The adaptation methodology developed during this research work is found to satisfy varied user demands from hardware.