Graduate Seminar with Nanqi Liu: A Low-Cost String DAC with Gradient Errors Suppression to Achieve 16-bit Linearity

Date/Time
Date(s) - 4 Dec 2019
1:10 PM - 2:00 PM

Location
2222 Coover Hall

Speaker: Nanqi Liu, ECpE Graduate Student

Adviser: Degang Chen

Title: A Low-Cost String DAC with Gradient Errors Suppression to Achieve 16-bit Linearity

Abstract: Resistor string is one of the classic digital-to-analog converter (DAC) architecture and has dominant applications where guaranteed monotonicity is important. For high-resolution string DACs, gradient errors limit the linearity performance by causing mismatch in the resistor arrays. In this presentation, a low-cost practical string DAC structure with gradient error suppression is proposed. It achieves good linearity by dividing a resistor string into multiple smaller substrings and placing them in a pattern where up to second order gradients are suppressed. Averaging and interpolation are implemented at substrings’ outputs to recover the bits of resolution with linearity improvement maintained. An 8-bit prototype was fabricated in a 130nm CMOS technology and achieved 16-bit linearity performance without trimming and calibration.

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Interested in giving a seminar? Contact Professor Namrata Vaswani.

Announcements and publicity by Kristin Clague, and scheduling by the department secretary.