Graduate Seminar: Techniques for design of robust and reliable analog circuits

When

September 7, 2022    
1:10 pm - 2:00 pm

Where

3043 ECpE Addition
Coover Hall, Ames, Iowa, 50011

Event Type

Title: Techniques for design of robust and reliable analog circuits

Speaker: Kushagra Bhathejacid

Abstract: Electronics systems are becoming ubiquitous in safety critical high volume applications. Some of these applications require the integrated circuits to work in extreme environmental conditions for long durations of time making their reliable operation of utmost importance. Digital designs have mature ‘design for testability(DFT)’ and ‘design for reliability(DFR)’ flows. However, their analog counterparts have only recently started catching up.

In this talk we first explore the various reliability problems plaguing analog circuits.  We then briefly look at an overview of some methods to improve analog reliability. These include improving test time/cost, on-chip monitoring of degradation phenomenon, on-chip built-in self-test. Finally we get into some details of one of these methods, viz, on—chip built-in self-test.

Bio: Kushagra Bhatheja received  M.Eng from  BITS, Pilani, India in 2013 and his B.Tech. from IP University, Delhi, India in 2011. He is currently pursuing Ph.D. in electrical and computer  engineering at Iowa  State  University,  Ames,  IA  , USA. In Fall of 2021 he was an intern with Texas Instruments working in the high speed amplifier group. In spring of 2021, he interned with Intel Corporation working on 3D NAND Flash memories. In summer 2019, he was an intern at NXP Semiconductors, Austin,  Texas  where  he  worked  in  the  Analog  Automotive Group.    From    2014-2017    he    was    employed    with    ST Microelectronics,  India  as  an  engineer  in  the  computational lithography  group.  From  2013-14  he  was  with  KLA  Tencor, working  on  Optical  Semiconductor Inspection.  His  current interests are analog and mixed signal design, and low cost BIST design for data converters

Advisor: Prof. Degang Chen

 

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