Graduate Seminar with Pei Zhang: A Hardware/Software Co-design Framework for Deploying Runtime Verification Technique

Date/Time
Date(s) - 27 Feb 2019
1:10 PM - 2:00 PM

Location
3043 ECpE Building Addition

Speaker: Pei Zhang, ECpE Graduate Student

Adviser: Phillip H. Jones and Kristin Y. Rozier

Title: A Hardware/Software Co-design Framework for Deploying Runtime Verification Technique

Abstract: Runtime verification (RV) of formal specifications has become essential for the operation of safety-critical real-time systems. Though many RV tools assume unlimited resource-support, e.g., for verification over software systems, in many flight-certified, embedded, or hardware systems (e.g., FPGAs), resources available for monitoring formal specifications are constrained. As a result, it is crucial to design an efficient memory model for verification over hardware platforms as well as to estimate the size of the specifications that can be handled based on resources with a fixed capacity. In this seminar, I will talk about the software compiler for interpreting temporal formulas for hardware, and how we embedded the runtime software-configurable hardware temporal logic computation core into a resource-constrained FPGA inside NASA’s Robonaut2.

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Contact Information

Interested in giving a seminar? Contact Professor Namrata Vaswani.

Announcements and publicity by Kristin Clague, and scheduling by the department secretary.