Graduate Seminar: Chongli Cai

When

December 7, 2016    
1:10 pm - 2:00 pm

Where

2222 Coover Hall
Coover Hall, Ames, Iowa, 50011

Event Type

Speaker: Chongli Cai

Advisor: Degang Chen

Title: Methods of Improving Cascode Compensation Damping for Two-Stage Amplifier

Abstract: Miller compensation scheme requires to burn large amount power in the output stage for driving capacitive load, which results in a large output devices size. In turn, large outputdevices contribute significant loading parasitic capacitors and thus degrading the amplifier’s stability. Cascode compensation can improve the capacitive load driving by adding the extra gain stage in the miller loop. Therefore, for achieving the same capacitive load driving, cascode compensation requires less quiescent current at output stage and thus smaller output device size and less loading parasitic capacitors for preceding stage. However, cascode compensation can introduce two conjugate complex poles in the miller loop and result in gain peaking at small capacitive load and dc load current. To avoid gain peaking, the cascode transistor working as a current buffer needs to consume sufficient amount power,which makes this compensation scheme becoming power inefficient. In this talk, two methods of improving cascode compensation damping for two-stage amplifier are purposed. Method 1 splits the certain portion of cascode compensation capacitor as a conventional miller capacitor and directly feeding into the input of output stage. Method 2 adds a passive RC network as the load of current buffer for additional freedom parameter to adjust miller loop damping. Method 2 is more advanced than Method 1 in terms of retaining phase margin and settling time and improving gain margin, but it requires extra capacitor and resistor area. Both methods are demonstrated on a 10MHz GBW two-stage amplifier with cascodecompensation in standard 0.6µm process.

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