Title: A Compensation Method and Design Flow for Three-stage Amplifiers
Speaker: Xu Zhang, ECpE Graduate Student
Advisor: Degang Chen, Jerry R. Junkins Chair
Abstract:A method – cascode and transconductance with capacitances feedback compensation (CTCFC) – for three-stage amplifiers is discussed in this presentation. By adding current buffers in the compensation feedback loops from the output stage to the outputs of the 1st and 2nd stages, the shorting effect of capacitors is eliminated, which enlarges the gain at higher frequency region. The capacitive driving ability is maintained which increases the gain-bandwidth product by the ratio of load capacitances to parasitic capacitance. Then, the entire procedure is completed by a proposed design flow directly based on closed-loop analysis with Routh-Hurwitz Criterion (RHC). The proposed technique and design flow have been verified by implementations in 65nm and 130nm CMOS processes. The gain-bandwidth product (GBW) is higher than 2.5MHz with a capacitive load of 500pF. The slew rate is higher than 0.6V/μs and the current consumption is lower than 20uA which shows improvements in FOM evaluations.