Faculty Seminar Series – Degang Chen

Date/Time
Date(s) - 28 Apr 2014
1:10 PM - 2:00 PM

Location
1012 Coover Hall

Degang Chen

Degang Chen

Title: Feedback Loops and Trojan States: Hardware Threats to Cyber Security and Trusted Electronics

Speaker: Degang Chen, Professor

Abstract: Feedback is a powerful technique widely used in many fields, including integrated circuit design. For example, all non-trivial circuits contain one, and many times more than one, self-stabilized feedback loops that form the core of reference current generators, reference voltage generators, reference time/frequency generators, current regulators, voltage regulators, and so on. However, feedback also creates serious problems such as instability and unwanted oscillations. In the basic circuits just enumerated, inappropriate design of feedback can create hidden, undesired stable operating points, called Trojan states. Under certain conditions, circuits and systems can get stuck at one of these undesired operating points. When this happens, severe performance degradation and/or total system failure will result. Power-off and power-on is the only known way to bring the system out of the Trojan state. These Trojan states are truly insidious because there are no existing tools that can systematically detect their existence, or guarantee the absence. In addition to accidental insertion of Trojan states due to the lack of design tools for preventing them, they could be maliciously inserted and triggered to do harm. This poses one of the most stealth hardware threats to cyber security and trusted electronics.

In this talk, we will briefly describe the problem and quickly review the state of the art in Trojan detection and verification. We will then describe an integrated design and verification approach that we are currently working on. Following the proposed approach, only verifiable circuits will be designed, Trojan state vulnerability will be systematically identified, and if passed our verification, absence of Trojan states will be guaranteed. Furthermore, the computational efficiency of our method is several orders of magnitude better than the best of the state of the art analog verification methods.

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