CprE 381 - Computer Organization and Assembly Level Programming [WebCT]
Offerings: [Fall 2009], [Fall 2008]
Description: Introduction to computer organization, evaluating
performance of computer systems, instruction set
design. Assembly level programming: arithmetic
operations, control flow instructions, procedure calls,
stack management. Processor design. Datapath and
control, scalar pipelines, introduction to memory and
I/O systems.
Prerequisites: CprE 281 - Digital Logic
CprE 594 - Embedded Systems Research Skills [webpage]
Offerings: [Spring 2009]
Description: industry-standard tools and optimization strategies;
practical embedded platforms and technology (reconfigurable platforms, multi-core platforms,
low-power platforms); instruction augmentation, memory-mapped accelerator design,
embedded software optimization. Students will be encouraged to compete as teams in
an embedded system design competition.
Description: Design, implementation, and
testing of embedded computer systems. System-level
design. Co-design of hardware and software. Concurrency,
real-time control, hardware/software interfaces, and error
handling.
Description: Introduction to reconfigurable computing,
FPGA technology and architectures, spatial computing
architectures, systolic and bit serial architectures,
adaptive network architectures, bus-based and static
dynamic rearrangeable interconnection structure
architectures, reconfigurable computing architectures for
processors.
Prerequisites: Background in computer architecture,
design, and organization.
Courses Taught at Northwestern
ECE 510 - Computer Security and Information
Assurance [syllabus]
Offerings: [Spring 2005], [Spring 2004]
Description: Graduate survey course covering
topics including an introduction to cryptography and its
applications; classification of attacks on application
security, operating system security, network security;
authentication and authorization; state of the art
implementation attacks; secure systems; software
protection, digital rights management; privacy/trust
issues.
Description: A quarter long team project that
entails designing a processor for a complete Instruction
Set. Project involves ISA design, design of components,
datapath and control for a pipelined processor to
implement the ISA. The processor is implemented using
industry strength design tools with VHDL as the
specification language. The design is evaluated using
benchmark programs for correctness and performance.