 Education
PhD, Computer Science, University of Texas at Austin (1999) MS, Computer Science, University of Texas at Austin (1994) BS, Computer Science, University of Hong Kong, China (1993) Research Interests Interconnect optimization; placement and routing of VLSI circuits Core Research Areas: VLSI; computing and networking systems Strategic Research Area: Small-Scale Technology
Selected PublicationsYan, J. Z., and C. Chu, “Deferred Decision Making Enabled Fixed-Outline Floor planner.” In Proc. IEEE/ACM Design Automation Conference, Anaheim, CA, June 8-13, 2008.
Chu, C. and Y. C.Wong. “FLUTE: Fast Lookup Table-based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design.” IEEE Transactions on Computer-Aided Design 27, no. 1, (January 2008): 70–83.
Viswanathan, N., G. J. Nam, C. Alpert, P. Villarrubia, H. Ren and C. Chu. “RQL: Global Placement via Relaxed Quadratic Spreading and Linearization.” IEEE/ACM Design Automation Conference, San Diego, CA, June 4-8, 2007, 453–458.
Pan, M. and C. Chu. “IPR: An Integrated Placement and Routing Algorithm.” In Proc. IEEE/ACM Design Automation Conference, San Diego, CA, June 4-8, 2007: 59–62.
Viswanathan, N. and C. Chu. “FastPlace: Efficient Analytical Placement Using Cell Spreading, Iterative Local Refinement and a Hybrid Net Model.” In Proc. of the International Symposium on Physical Design, Phoenix, AZ, April 18-21, 2004, 26–33.
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