 EducationPhD, Computer Engineering, Northwestern University (2006)
MS, Computer Engineering, Northwestern University (2002)
BS, Computer Engineering, Northwestern University (2001) Research InterestsReconfigurable computing, computer security, compilers, computer architecture Core Research Area: Computing and networking systems Strategic Research Area: Cyber infrastructure
Select PublicationsPande, A. and J. Zambreno. "An Efficient Hardware Architecture for Multimedia Encryption and Authentication using the Discrete Wavelet Transform.” In Proc. IEEE Computer Society Annual Symposium on VLSI, (May 2009): 85–90.
Sun, S. and J. Zambreno. "Mining Association Rules with Systolic Trees.” In Proc. International Conference on Field-Programmable Logic and its Applications, (September 2008): 143–148.
Nguyen, D., A. Das, J. Zambreno, G. Memik, and A. Choudhary. "An FPGA-Based Network Intrusion Detection Architecture.” IEEE Transactions on Information Forensics and Security 3, no. 1, (2008): 118–132.
Zambreno, J., D. Honbo, A. Choudhary, R. Simha, and B. Narahari. "High-Performance Software Protection Using Reconfigurable Architectures.” In Proc. IEEE 94, no. 2, (2006): 1–13.
Zambreno, J., A. Choudhary, R. Simha, B. Narahari, and N. Memon. "SAFE-OPS: An Approach to Embedded Software Security.” ACM Transactions on Embedded Computing Systems 4, no. 1, (2005): 189–210.
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